disassembler sorta
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169
source/app.d
169
source/app.d
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@ -8,10 +8,175 @@ import imgui;
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struct Chip8Status {
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struct Assembly {
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import assembler;
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alias OpCode = Assembler.OpCode;
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alias Instr = Assembler.Instruction;
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alias Arg = Assembler.Argument;
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enum ViewMode {
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Memory,
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Disassembly
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}
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private {
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Chip8* emu_;
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ViewMode mode_;
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int range_start_;
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int range_end_;
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// disassembly state
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Instr[] disassembly_;
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}
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void initialize(Chip8* emu) {
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emu_ = emu;
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} // initialize
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static const (char)* formatQual(Arg a, bool with_comma = false) {
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if (with_comma) {
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switch (a) with (Arg) {
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case Vx, Vy, V0: return "V%hu, ";
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case nibble: return "%01X, ";
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case beit: return "0x%02X, ";
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case addr: return "0x%03X, ";
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default: return "%s, ";
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}
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} else {
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switch (a) with (Arg) {
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case Vx, Vy, V0: return "V%hu";
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case nibble: return "0x%01X";
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case beit: return "0x%02X";
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case addr: return "0x%03X";
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default: return "%s";
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}
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}
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}
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void disassemble() {
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ubyte[] instrs = emu_.ram[range_start_ .. range_end_];
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disassembly_ = Assembler.disassemble(instrs);
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writefln("%s", disassembly_);
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}
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void setRange(ushort start, ushort end) {
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range_start_ = start;
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range_end_ = end;
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}
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void draw() {
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import std.range : chunks;
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if (mode_ == ViewMode.Memory) igBegin("Emulator Assembly - Memory View");
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else if (mode_ == ViewMode.Disassembly) igBegin("Emulator Assembly - Disassembly View");
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if (igButton("Switch Mode")) {
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mode_ = cast(ViewMode)((mode_ + 1) % 2);
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}
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if (mode_ == ViewMode.Memory) {
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} else if (mode_ == ViewMode.Disassembly) {
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igInputInt("Range Start: ", &range_start_);
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igInputInt("Range End: ", &range_end_);
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if (igButton("Disassemble")) {
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disassemble();
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}
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}
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if (range_start_ < 0) range_start_ = 0;
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if (range_start_ > ushort.max) range_start_ = 0;
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if (range_end_ < range_start_) range_end_ = 0;
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if (range_end_ > ushort.max) range_end_ = 0;
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if (mode_ == ViewMode.Memory) {
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/*
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foreach (ref ubyte[] b; emu_.ram[0x200 + range_start_ .. range_end_].chunks(2)) {
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ushort opcode = (*(cast(ushort*)(b.ptr)));
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igText("0x%04X", opcode);
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}
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*/
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} else if (mode_ == ViewMode.Disassembly) {
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foreach (ref instr; disassembly_) {
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switch (instr.args) {
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case 3:
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igText("%s", instr.op);
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igSameLine();
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Arg a1_arg;
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auto a1 = instr.a1(a1_arg);
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igText(formatQual(a1_arg), a1, true);
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igSameLine();
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Arg a2_arg;
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auto a2 = instr.a2(a2_arg);
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igText(formatQual(a2_arg), a2, true);
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igSameLine();
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Arg a3_arg;
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auto a3 = instr.a3(a3_arg);
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igText(formatQual(a3_arg), a3);
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break;
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case 2:
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igText("%s", instr.op);
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igSameLine();
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Arg a1_arg;
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auto a1 = instr.a1(a1_arg);
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igText(formatQual(a1_arg), a1, true);
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igSameLine();
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Arg a2_arg;
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auto a2 = instr.a2(a2_arg);
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igText(formatQual(a2_arg), a2);
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break;
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case 1:
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igText("%s", instr.op);
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igSameLine();
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Arg a1_arg;
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auto a1 = instr.a1(a1_arg);
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igText(formatQual(a1_arg), a1);
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break;
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case 0:
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igText("%s", instr.op);
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break;
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default:
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break;
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}
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}
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}
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igEnd();
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} // draw
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} // Assembly
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// emu ptr
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Emulator* run_;
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Chip8* emu_;
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// assembly/disassembly
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Assembly ass_;
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// loaded program
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const (char)* loaded_program;
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@ -25,6 +190,7 @@ struct Chip8Status {
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void initialize(Emulator* run, Chip8* emu) {
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this.run_ = run;
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this.emu_ = emu;
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ass_.initialize(emu);
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} // initialize
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alias Callback = float delegate(int idx, const char** out_text);
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@ -65,6 +231,7 @@ struct Chip8Status {
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loaded_program = "chip8_picture.ch8";
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auto buf = read("programs/chip8_picture.ch8");
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emu_.load(0x200, buf); // do ze load yes, will copy all the data in
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ass_.setRange(cast(ushort)0x200, cast(ushort)(0x200 + cast(ushort)buf.length));
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} // loadShortcut
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@ -94,6 +261,8 @@ struct Chip8Status {
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void draw() {
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ass_.draw();
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if (!status_menu_) return;
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if (igBeginMainMenuBar()) {
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@ -43,44 +43,51 @@ struct Assembler {
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0xFx65 - LD Vx, [I]
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*/
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enum OpCode {
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enum OpCode : const (char)* {
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UNK, // UNKNOWN
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UNK = "UNK", // UNKNOWN
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CLS, // CLS
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RET, // RET
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CALL, // CALL addr
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CLS = "CLS", // CLS
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RET = "RET", // RET
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CALL = "CALL", // CALL addr
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ADD, // ADD Vx, Vy
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ADD = "ADD", // ADD Vx, Vy
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// ADD Vx, byte
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// ADD I, Vx
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SUB, // SUB Vx, Vy
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SUB = "SUB", // SUB Vx, Vy
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// SUB Vx, byte
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SUBN, // SUBN Vx, Vy
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SUBN = "SUBN", // SUBN Vx, Vy
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SE, // SE Vx, Vy
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SE = "SE", // SE Vx, Vy
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// SE Vx, byte
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SNE, // SNE Vx, byte
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SKP, // SKP Vx
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SKNP, // SKNP Vx
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SNE = "SNE", // SNE Vx, byte
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SKP = "SKP", // SKP Vx
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SKNP = "SKNP", // SKNP Vx
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SHL, // SHL Vx {, Vy}
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SHR, // SHR Vx {, Vy}
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XOR, // XOR Vx, Vy
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AND, // AND Vx, Vy
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OR, // OR Vx, Vy
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SHL = "SHL", // SHL Vx {, Vy}
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SHR = "SHR", // SHR Vx {, Vy}
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XOR = "XOR", // XOR Vx, Vy
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AND = "AND", // AND Vx, Vy
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OR = "OR", // OR Vx, Vy
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LD, // LD Vx, DT
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LD = "LD", // LD Vx, DT
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// LD DT, Vx
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// LD ST, Vx
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// LD Vx, K
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// LD [I], Vx
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// LD Vx, [I]
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RND // RND Vx, byte
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RND = "RND", // RND Vx, byte,
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JP = "JP", // JP addr
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// JP V0, addr
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DRW = "DRW", // DRW Vx, Vy, nibble
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SYS = "SYS" // SYS addr | probably unused? but still
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}
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@ -90,20 +97,137 @@ struct Assembler {
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Vx,
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Vy,
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V0,
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I,
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I_addr,
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DT,
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ST,
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K,
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B,
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F,
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beit,
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nibble,
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addr,
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val
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}
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struct Instruction {
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OpCode op;
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Argument a1;
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Argument a2;
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@property {
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ubyte vx() {
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return (v_ & 0x0F00) >> 8;
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}
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ubyte vy() {
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return (v_ & 0x00F0) >> 4;
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}
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ubyte n() {
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return (v_ & 0x000F);
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}
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ubyte nn() {
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return (v_ & 0x00FF);
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}
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ushort nnn() {
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return (v_ & 0x0FFF);
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}
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}
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private {
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ushort v_; // raw value
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OpCode op_;
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Argument a1_;
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Argument a2_;
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Argument a3_;
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}
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void* extract(Argument a) {
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final switch (a) with (Argument) {
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case Vx: return cast(void*)(vx());
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case Vy: return cast(void*)(vy());
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case V0: return cast(void*)(0);
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case I: return cast(void*)("I".ptr);
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case I_addr: return cast(void*)("[I]".ptr);
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case DT: return cast(void*)("DT".ptr);
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case ST: return cast(void*)("ST".ptr);
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case B: return cast(void*)("B".ptr);
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case F: return cast(void*)("F".ptr);
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case K: return cast(void*)("K".ptr);
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case nibble: return cast(void*)(n());
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case beit: return cast(void*)(nn());
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case addr: return cast(void*)(nnn());
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case Nil: return cast(void*)(0);
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}
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}
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@property
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OpCode op() {
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return op_;
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}
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void* a1(out Argument a) {
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a = a1_;
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return extract(a1_);
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}
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void* a2(out Argument a) {
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a = a2_;
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return extract(a2_);
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}
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void* a3(out Argument a) {
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a = a3_;
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return extract(a3_);
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}
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@property int args() {
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int args = 0;
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args += (a1_ != Argument.Nil);
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args += (a2_ != Argument.Nil);
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args += (a3_ != Argument.Nil);
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return args;
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}
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this(ushort v, OpCode op, Argument a) {
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v_ = v;
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op_ = op;
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a1_ = a;
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}
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this(ushort v, OpCode op, Argument a1, Argument a2) {
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v_ = v;
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op_ = op;
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a1_ = a1;
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a2_ = a2;
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}
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this(ushort v, OpCode op, Argument a1, Argument a2, Argument a3) {
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v_ = v;
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op_ = op;
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a1_ = a1;
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a2_ = a2;
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a3_ = a3;
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}
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this(ushort v, OpCode op) {
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v_ = v;
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op_ = op;
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}
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}
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import std.array;
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@ -129,52 +253,98 @@ struct Assembler {
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} // assemble
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const (char)[] disassemble(ubyte[] instructions) {
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static Instruction[] disassemble(ubyte[] instructions) {
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import std.range : chunks;
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foreach (ref ubyte[] i; instructions.chunks(2)) {
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auto instr_output = Appender!(Instruction[])();
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ushort opcode = (*(cast(ushort*)(i.ptr)));
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foreach (ref ubyte[] i; instructions.chunks(2)) {
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ushort opcode = i[0] << 8 | i[1];
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switch (opcode & 0xF000) {
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case 0x0000:
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switch (opcode & 0x0FFF) {
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case 0x00E0: // 0x00E0 Clears the screen. | CLS
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instr_output ~= Instruction(opcode, OpCode.CLS);
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break;
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case 0x00EE: // 0x00EE Returns from a subroutine. | RET
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instr_output ~= Instruction(opcode, OpCode.RET);
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break;
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default: // 0x0NNN Calls RCA 1802 program at address NNN. Not necessary for most ROMs. | SYS addr
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//assert(0, "0x0NNN RCA 1802 program opcode not implemented!");
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instr_output ~= Instruction(opcode, OpCode.SYS, Argument.addr);
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break;
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}
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break;
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case 0x1000: // 0x1NNN Jumps to address NNN. | JP addr
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instr_output ~= Instruction(opcode, OpCode.JP, Argument.addr);
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break;
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case 0x2000: // 0x2NNN Calls subroutine at NNN. | CALL addr
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instr_output ~= Instruction(opcode, OpCode.CALL, Argument.addr);
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break;
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case 0x3000: // 0x3XNN Skips the next instruction if VX equals NN. | SE Vx, byte
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instr_output ~= Instruction(opcode, OpCode.SE, Argument.Vx, Argument.beit);
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break;
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case 0x4000: // 0x4XNN Skips the next instruction if VX doesn't equal NN. | SNE Vx, byte
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instr_output ~= Instruction(opcode, OpCode.SNE, Argument.Vx, Argument.beit);
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break;
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case 0x5000: // 0x5XYO Skips the next instruction if VX equals VY. | SE Vx, Vy
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instr_output ~= Instruction(opcode, OpCode.SE, Argument.Vx, Argument.Vy);
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break;
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case 0x6000: // 0x6XNN Sets VX to NN. | LD Vx, byte
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case 0x7000: // 0x7XNN Adds NN to VX. | AD Vx, byte
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instr_output ~= Instruction(opcode, OpCode.LD, Argument.Vx, Argument.beit);
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break;
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case 0x7000: // 0x7XNN Adds NN to VX. | ADD Vx, byte
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instr_output ~= Instruction(opcode, OpCode.ADD, Argument.Vx, Argument.beit);
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break;
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case 0x8000:
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switch (opcode) {
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case 0x0000: // 0x8XY0 Sets VX to the value of VY. | LD Vx, Vy
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instr_output ~= Instruction(opcode, OpCode.LD, Argument.Vx, Argument.Vy);
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break;
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case 0x0001: // 0x8XY1 Sets VX to VX or VY. | OR Vx, Vy
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instr_output ~= Instruction(opcode, OpCode.OR, Argument.Vx, Argument.Vy);
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break;
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case 0x0002: // 0x8XY2 Sets VX to VX and VY. | AND Vx, Vy
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instr_output ~= Instruction(opcode, OpCode.AND, Argument.Vx, Argument.Vy);
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break;
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case 0x0003: // 0x8XY3 Sets VX to VX xor VY. | XOR Vx, Vy
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instr_output ~= Instruction(opcode, OpCode.XOR, Argument.Vx, Argument.Vy);
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break;
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case 0x0004: // 0x8XY4 Adds VY to VX. VF is set to 1 when there's a carry, and to 0 when there isn't. | ADD Vx, Vy
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instr_output ~= Instruction(opcode, OpCode.ADD, Argument.Vx, Argument.Vy);
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break;
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case 0x0005: // 0x8XY5 VY is subtracted from VX. VF is set to 0 when there's a borrow, and 1 when there isn't. | SUB Vx, Vy
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instr_output ~= Instruction(opcode, OpCode.SUB, Argument.Vx, Argument.Vy);
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break;
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case 0x0006: // 0x8XY6 Shifts VX right by one. VF is set to the value of the least significant bit of VX before the shift. | SHR Vx {, Vy}
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instr_output ~= Instruction(opcode, OpCode.SHR, Argument.Vx); // FIXME? what about Vy here actually?
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break;
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case 0x0007: // 0x8XY7 Sets VX to VY minus VX. VF is set to 0 when there's a borrow, and 1 when there isn't. | SUBN Vx, Vy
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instr_output ~= Instruction(opcode, OpCode.SUBN, Argument.Vx, Argument.Vy);
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break;
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case 0x000E: // 0x8XYE Shifts VX left by one. VF is set to the value of the most significant bit of VX before the shift. | SHL Vx {, Vy}
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instr_output ~= Instruction(opcode, OpCode.SHL, Argument.Vx); // FIXME? what about Vy here actually?
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break;
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default: // unhandled for some reason
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instr_output ~= Instruction(opcode, OpCode.UNK);
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writefln("unknown opcode: 0x%x", opcode);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case 0x9000: // 0x9XYO Skips the next instruction if VX doesn't equal VY. | SNE Vx, Vy
|
||||
instr_output ~= Instruction(opcode, OpCode.SNE, Argument.Vx, Argument.Vy);
|
||||
break;
|
||||
case 0xA000: // 0xANNN Sets I to the address NNN. | LD I, addr
|
||||
instr_output ~= Instruction(opcode, OpCode.LD, Argument.I, Argument.addr);
|
||||
break;
|
||||
case 0xB000: // 0xBNNN Jumps to the address NNN plus V0. | JP V0, addr
|
||||
instr_output ~= Instruction(opcode, OpCode.JP, Argument.V0, Argument.addr);
|
||||
break;
|
||||
case 0xC000: // 0xCXNN Sets VX to the result of a bitwise and operation on a random number and NN. | RND Vx, byte
|
||||
instr_output ~= Instruction(opcode, OpCode.RND, Argument.Vx, Argument.beit);
|
||||
break;
|
||||
|
||||
// 0xDXYN | DRW Vx, Vy, nibble
|
||||
// Sprites stored in memory at location in index register (I), 8bits wide.
|
||||
|
|
@ -183,11 +353,18 @@ struct Assembler {
|
|||
// Sprites are drawn starting at position VX, VY. N is the number of 8bit rows that need to be drawn.
|
||||
// If N is greater than 1, second line continues at position VX, VY+1, and so on.
|
||||
case 0xD000:
|
||||
instr_output ~= Instruction(opcode, OpCode.DRW, Argument.Vx, Argument.Vy, Argument.beit);
|
||||
break;
|
||||
case 0xE000:
|
||||
switch (opcode & 0x000F) {
|
||||
case 0x000E: // 0xEX9E Skips the next instruction if the key stored in VX is pressed. | SKP Vx
|
||||
instr_output ~= Instruction(opcode, OpCode.SKP, Argument.Vx);
|
||||
break;
|
||||
case 0x0001: // 0xEXA1 Skips the next instruction if the key stored in VX isn't pressed. | SKNP Vx
|
||||
instr_output ~= Instruction(opcode, OpCode.SKNP, Argument.Vx);
|
||||
break;
|
||||
default: // unhandled for some reason
|
||||
instr_output ~= Instruction(opcode, OpCode.UNK);
|
||||
writefln("unknown opcode: 0x%x", opcode);
|
||||
break;
|
||||
}
|
||||
|
|
@ -195,28 +372,48 @@ struct Assembler {
|
|||
case 0xF000:
|
||||
switch (opcode & 0x00FF) {
|
||||
case 0x0007: // 0xFX07 Sets VX to the value of the delay timer. | LD Vx, DT
|
||||
instr_output ~= Instruction(opcode, OpCode.LD, Argument.Vx, Argument.DT);
|
||||
break;
|
||||
case 0x000A: // 0xFX0A A key press is awaited, and then stored in VX. | LD Vx, K
|
||||
instr_output ~= Instruction(opcode, OpCode.LD, Argument.Vx, Argument.K);
|
||||
break;
|
||||
case 0x0015: // 0xFX15 Sets the delay timer to VX. | LD DT, Vx
|
||||
instr_output ~= Instruction(opcode, OpCode.LD, Argument.DT, Argument.Vx);
|
||||
break;
|
||||
case 0x0018: // 0xFX18 Sets the sound timer to VX. | LD ST, Vx
|
||||
instr_output ~= Instruction(opcode, OpCode.LD, Argument.ST, Argument.Vx);
|
||||
break;
|
||||
case 0x001E: // 0xFX1E Adds VX to I. | ADD I, Vx
|
||||
instr_output ~= Instruction(opcode, OpCode.ADD, Argument.I, Argument.DT);
|
||||
break;
|
||||
case 0x0029: // 0xFX29 Sets I to the location of the sprite for the character in VX. | LD F, Vx
|
||||
instr_output ~= Instruction(opcode, OpCode.LD, Argument.F, Argument.DT);
|
||||
break;
|
||||
// 0xFX33 Stores the Binary-coded decimal representation of VX,
|
||||
// with the most significant of three digits at the address in I,
|
||||
// the middle digit at I plus 1, and the least significant digit at I plus 2.
|
||||
case 0x0033: // 0xFX33 ??? FIXME? | LD B, Vx
|
||||
instr_output ~= Instruction(opcode, OpCode.LD, Argument.B, Argument.Vx);
|
||||
break;
|
||||
case 0x0055: // 0xFX55 Stores V0 to VX in memory starting at address I. | LD [I], Vx
|
||||
instr_output ~= Instruction(opcode, OpCode.LD, Argument.I_addr, Argument.DT);
|
||||
break;
|
||||
case 0x0065: // 0xFX65 Fills V0 to VX with values from memory starting at address I. | LD Vx, [I]
|
||||
instr_output ~= Instruction(opcode, OpCode.LD, Argument.Vx, Argument.I_addr);
|
||||
break;
|
||||
default: // unhandled for some reason
|
||||
instr_output ~= Instruction(opcode, OpCode.UNK);
|
||||
writefln("unknown opcode: 0x%x", opcode);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
instr_output ~= Instruction(opcode, OpCode.UNK);
|
||||
writefln("unknown opcode: 0x%x", opcode);
|
||||
}
|
||||
}
|
||||
|
||||
return "";
|
||||
return instr_output.data;
|
||||
|
||||
} // dissassemble
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue