assembly/disassembly stuff
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parent
d0b7670eca
commit
ead5f8c370
199
source/app.d
199
source/app.d
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@ -346,12 +346,181 @@ struct PixelBuffer {
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} // PixelBuffer
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} // PixelBuffer
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struct Assembler {
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enum OpCode {
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CLS, // CLS
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RET, // RET
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CALL, // CALL addr
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ADD, // ADD Vx, Vy
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// ADD Vx, byte
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// ADD I, Vx
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SUB, // SUB Vx, Vy
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// SUB Vx, byte
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SUBN, // SUBN Vx, Vy
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SE, // SE Vx, Vy
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// SE Vx, byte
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SNE, // SNE Vx, byte
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SKP, // SKP Vx
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SKNP, // SKNP Vx
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SHL, // SHL Vx {, Vy}
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SHR, // SHR Vx {, Vy}
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XOR, // XOR Vx, Vy
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AND, // AND Vx, Vy
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OR, // OR Vx, Vy
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LD, // LD Vx, DT
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// LD DT, Vx
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// LD ST, Vx
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// LD Vx, K
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// LD [I], Vx
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// LD Vx, [I]
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RND // RND Vx, byte
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}
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enum Parameter {
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Vx,
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Vy,
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DT,
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ST,
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K,
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addr,
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val
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}
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struct Instruction {
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}
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import std.array;
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Appender!string dissassembly_data;
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void assemble(const char* input) {
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} // assemble
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void assemble(const char[] input) {
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} // assemble
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const (char)[] disassemble(ubyte[] instructions) {
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import std.range : chunks;
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foreach (ref ubyte[] i; instructions.chunks(2)) {
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ushort opcode = (*(cast(ushort*)(i.ptr)));
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switch (opcode & 0xF000) {
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case 0x0000:
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switch (opcode & 0x0FFF) {
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case 0x00E0: // 0x00E0 Clears the screen.
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case 0x00EE: // 0x00EE Returns from a subroutine.
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default: // 0x0NNN Calls RCA 1802 program at address NNN. Not necessary for most ROMs.
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//assert(0, "0x0NNN RCA 1802 program opcode not implemented!");
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break;
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}
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break;
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case 0x1000: // 0x1NNN Jumps to address NNN.
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case 0x2000: // 0x2NNN Calls subroutine at NNN.
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case 0x3000: // 0x3XNN Skips the next instruction if VX equals NN.
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case 0x4000: // 0x4XNN Skips the next instruction if VX doesn't equal NN.
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case 0x5000: // 0x5XYO Skips the next instruction if VX equals VY.
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case 0x6000: // 0x6XNN Sets VX to NN.
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case 0x7000: // 0x7XNN Adds NN to VX.
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case 0x8000:
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switch (opcode) {
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case 0x0000: // 0x8XY0 Sets VX to the value of VY.
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case 0x0001: // 0x8XY1 Sets VX to VX or VY.
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case 0x0002: // 0x8XY2 Sets VX to VX and VY.
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case 0x0003: // 0x8XY3 Sets VX to VX xor VY.
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case 0x0004: // 0x8XY4 Adds VY to VX. VF is set to 1 when there's a carry, and to 0 when there isn't.
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case 0x0005: // 0x8XY5 VY is subtracted from VX. VF is set to 0 when there's a borrow, and 1 when there isn't.
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case 0x0006: // 0x8XY6 Shifts VX right by one. VF is set to the value of the least significant bit of VX before the shift.
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case 0x0007: // 0x8XY7 Sets VX to VY minus VX. VF is set to 0 when there's a borrow, and 1 when there isn't.
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case 0x000E: // 0x8XYE Shifts VX left by one. VF is set to the value of the most significant bit of VX before the shift.
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default: // unhandled for some reason
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writefln("unknown opcode: 0x%x", opcode);
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break;
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}
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break;
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case 0x9000: // 0x9XYO Skips the next instruction if VX doesn't equal VY.
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case 0xA000: // 0xANNN Sets I to the address NNN.
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case 0xB000: // 0xBNNN Jumps to the address NNN plus V0.
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case 0xC000: // 0xCXNN Sets VX to the result of a bitwise and operation on a random number and NN.
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// 0xDXYN
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// Sprites stored in memory at location in index register (I), 8bits wide.
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// Wraps around the screen. If when drawn, clears a pixel, register VF is set to 1 otherwise it is zero.
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// All drawing is XOR drawing (i.e. it toggles the screen pixels).
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// Sprites are drawn starting at position VX, VY. N is the number of 8bit rows that need to be drawn.
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// If N is greater than 1, second line continues at position VX, VY+1, and so on.
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case 0xD000:
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case 0xE000:
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switch (opcode & 0x000F) {
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case 0x000E: // 0xEX9E Skips the next instruction if the key stored in VX is pressed.
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case 0x0001: // 0xEXA1 Skips the next instruction if the key stored in VX isn't pressed.
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default: //unhandled for some reason
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writefln("unknown opcode: 0x%x", opcode);
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break;
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}
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break;
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case 0xF000:
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switch (opcode & 0x00FF) {
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case 0x0007: // 0xFX07 Sets VX to the value of the delay timer.
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case 0x000A: // 0xFX0A A key press is awaited, and then stored in VX.
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case 0x0015: // 0xFX15 Sets the delay timer to VX.
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case 0x0018: // 0xFX18 Sets the sound timer to VX.
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case 0x001E: // 0xFX1E Adds VX to I.
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case 0x0029: // 0xFX29 Sets I to the location of the sprite for the character in VX.
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// 0xFX33 Stores the Binary-coded decimal representation of VX,
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// with the most significant of three digits at the address in I,
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// the middle digit at I plus 1, and the least significant digit at I plus 2.
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case 0x0033:
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case 0x0055: // 0xFX55 Stores V0 to VX in memory starting at address I.
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case 0x0065: // 0xFX65 Fills V0 to VX with values from memory starting at address I.
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default: // unhandled for some reason
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writefln("unknown opcode: 0x%x", opcode);
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break;
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}
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break;
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default:
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writefln("unknown opcode: 0x%x", opcode);
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}
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}
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return "";
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} // dissassemble
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} // Assembler
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struct Chip8Status {
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struct Chip8Status {
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//emu ptr
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// emu ptr
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Emulator* run_;
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Emulator* run_;
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Chip8* emu_;
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Chip8* emu_;
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// loaded program
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const (char)* loaded_program;
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// mem editor
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// mem editor
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// MemoryEditor mem_editor_;
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// MemoryEditor mem_editor_;
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@ -389,6 +558,8 @@ struct Chip8Status {
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void resetShortcut() {
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void resetShortcut() {
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loaded_program = null;
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emu_.reset();
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emu_.reset();
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} // resetShortcut
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} // resetShortcut
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@ -397,6 +568,7 @@ struct Chip8Status {
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import std.file : read;
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import std.file : read;
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loaded_program = "chip8_picture.ch8";
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auto buf = read("programs/chip8_picture.ch8");
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auto buf = read("programs/chip8_picture.ch8");
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emu_.load(0x200, buf); // do ze load yes, will copy all the data in
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emu_.load(0x200, buf); // do ze load yes, will copy all the data in
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@ -463,14 +635,19 @@ struct Chip8Status {
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igBegin("Emulator Status");
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igBegin("Emulator Status");
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igBeginChild("General");
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igBeginChild("General");
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igText("OpCode: 0x%04X", emu_.cpu.opcode);
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if (!loaded_program) {
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igText("PC:");
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igText("Loaded Program: none");
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} else {
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igText("Loaded Program: %s", loaded_program);
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}
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igText("Opcode: 0x%04X", emu_.cpu.opcode);
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igSameLine();
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igSameLine();
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igText("pc: 0x%04X (%hu)", emu_.cpu.pc, emu_.cpu.pc);
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igText("| PC: 0x%04X (%hu)", emu_.cpu.pc, emu_.cpu.pc);
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// igDragInt("##pc", cast(int*)&emu_.cpu.pc, 0.5f, 0, emu_.ram.length);
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// igDragInt("##pc", cast(int*)&emu_.cpu.pc, 0.5f, 0, emu_.ram.length);
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igText("Registers (v0 - vF)");
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igText("Registers (v0 - vF)");
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igColumns(4, null, false);
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igColumns(4, null, false);
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igIndent();
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auto n = 0;
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auto n = 0;
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foreach (ref chunk; emu_.cpu.v[].chunks(4)) {
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foreach (ref chunk; emu_.cpu.v[].chunks(4)) {
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@ -483,12 +660,24 @@ struct Chip8Status {
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}
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}
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igColumns(1, null, false);
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igColumns(1, null, false);
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igUnindent();
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igText("Index Register: 0x%04X", emu_.cpu.i);
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igText("Index Register: 0x%04X", emu_.cpu.i);
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igText("Delay Timer: 0x%04X", emu_.cpu.delay_timer);
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igText("Delay Timer: 0x%04X", emu_.cpu.delay_timer);
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igText("Sound Timer: 0x%04X", emu_.cpu.sound_timer);
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igText("Sound Timer: 0x%04X", emu_.cpu.sound_timer);
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if(igButton("Step")) {
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if (igButton("Reload")) {
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resetShortcut();
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loadShortcut();
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}
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igSameLine();
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if (igButton("Reset")) {
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resetShortcut();
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}
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if (igButton("Step")) {
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emu_.step();
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emu_.step();
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}
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}
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